The XMX engines, the matrix units that do the heavy lifting for AI maths, have been redesigned from the four-deep systolic layout of regular Xe3 to 16-deep processing on Xe3P. Each core pairs eight XMX engines with eight vector engines, and the silicon carries 1 MB of register file and 512 KB of L1 cache per core. FP4 data format is supported alongside FP8, and the card can be configured with up to 480 GB of LPDDR5X.

This is an inference card, not a training or graphics part: the Xe3P silicon omits the processing elements used to output imagery, and Intel says it is built for AI workloads with long context and agentic tasks, such as agents running thousands of steps against a 100K context while serving tokens quickly. A media engine with four encoders and four decoders is included, which could help with multimodal workloads involving video generation and understanding.

Practically, the card is a 350 W, air-cooled PCIe 5.0 x16 accelerator, so it should slot into conventional servers without dedicated liquid cooling. Real-world performance remains unseen; Intel has published the design but not benchmarks for what Xe3P can do in AI processing.