THE CRUNCH
NVIDIA has officially lowered key performance targets for its "Vera Rubin" accelerator line, according to an updated product specification sheet. HBM4 memory speed has been cut from 11.7 Gbps to 9.6 Gbps per pin, which brings total memory bandwidth in a Vera Rubin NVL72 rack-scale system down from 1,580 TB/s to 1,400 TB/s.
The interconnect has been trimmed too. NVLink bandwidth per GPU drops from 1.8 TB/s to 1.5 TB/s, taking bidirectional GPU bandwidth from 3.6 TB/s to 3 TB/s.
The reason, per the reporting, is signal integrity: NVIDIA reportedly lowered the NVLink Nyquist frequency target from 56 GHz to 47 GHz. That eases the electrical demands on the SerDes, cables and materials, which can improve manufacturing yields and feasibility at the cost of some peak bandwidth. The memory change is described as pointing to NVIDIA's own implementation of bus width and signalling rather than a supplier problem.
In numbers
Vera Rubin HBM4 speed per pin, before and after the spec update
11.7 Gbps per pin
Before update
9.6 Gbps per pin
After update
Figures from TechPowerUp, as quoted in this brief.